CMOS image sensors have become the dominant solid state imaging technology, due in large part to their lower cost relative to CCD imaging devices. Further, for certain applications, CMOS devices are superior in performance. The pixel elements in a MOS device can be made smaller and therefore provide a higher resolution than CCD image sensors. In addition, signal processing logic can be integrated alongside the imaging circuitry, thus allowing for a single integrated chip to form a complete stand alone imaging device.
An active pixel sensor refers to an electronic image sensor with active devices, such as transistors, within each pixel. Conventional active pixel sensors typically employ photodiodes as the image sensing elements. The most popular active pixel sensor structure consists of three transistors and an N+/P-well photodiode, which is a structure that is compatible with the standard CMOS fabrication process. However, this design has the drawback of a relatively large dark current (i.e., the current that is output from the pixel in a dark environment).
It is desirable for the active pixel to have a low dark current. Excessive dark current lowers the dynamic range of the CMOS image sensor because there is insufficient ability to distinguish between light and dark conditions. In addition, dark current is the cause of the “white pixel” defect in CMOS image sensors, i.e., a pixel that always outputs a large signal.
Another active pixel sensor design that is not fabricated using the standard CMOS fabrication process is the pinned photodiode, as shown in U.S. Pat. No. 5,625,210. The pinned photodiode has gained favor for its ability to have good color response for blue light, as well as advantages in dark current density. Reduction in dark current is accomplished by pinning the diode surface potential to the P-well or P-substrate (GND) through a P+ region. Because of the pinning P+ region, a transfer gate is necessary to output the charge of the photodiode to a N+ output region. An improvement to the '210 patent is shown in U.S. Pat. No. 5,880,495, assigned to the assignee of the present invention.
Nevertheless, the pinned photodiode configuration of the '210 still has dark current effects. Further, the fabrication process for such a configuration requires significant modification form the standard CMOS fabrication prices, due to the buried channel transistor. The pinned photodiode configuration may cause image lag due to the incomplete transfer of charge from the diode to the floating node, if the junction profile is not perfectly optimized for the charge transfer.
Another approach in the context of CCD image sensors is to use a hydrogen anneal process to reduce dark current by passivating dangling silicon bonds. For example, U.S. Pat. No. 6,271,054 discloses using such a method. However, subsequent thermal processes, due to the poor thermal stability of the silicon-hydrogen structure, may easily destroy the effect of hydrogen passivation.
Still another approach, disclosed in our co-pending patent application filed Nov. 2, 2001 entitled “SURFACE PASSIVATION TO REDUCE DARK CURRENT IN A CMOS IMAGE SENSOR” to Wu et al., assigned to the assignee of the present invention, and incorporated by reference, teaches the use of nitrogen, silicon, hydrogen, or oxygen to passivate the dangling silicon bonds in a CMOS compatible process.